Krste Asanović
Publications
- 2009, RAMP Gold: An FPGA-based Architecture Simulator for Multiprocessors
- 2009, Advantages of Silicon Photonics for Multi-socket Systems
- 2009, Manycore processor networks with monolithic integrated CMOS photonics
- 2009, Silicon-Photonic Clos Networks for Global On-Chip Communication
- 2009, SEJITS: Getting Productivity and PerformanceWith Selective Embedded JIT Specialization
- 2009, Silicon-Photonic Clos Networks for Global On-Chip Communication
- 2009, The Manycore Revolution: Will the HPC Community Lead or Follow?
- 2009, Enabling Software Composability for the Manycore Era
- 2009, Parallel Web Page Layout
- 2008, Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
- 2008, Compiling for Vector-thread Architectures
- 2008, The Parallel Computing Laboratory at U.C. Berkeley: A Research Agenda Based on the Berkeley View
- 2008, Implementing the Scale Vector-Thread Processor
- 2008, The Case for Malleable Stream Architectures
- 2008, Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics
- 2008, RAMP Blue: Implementation of a Multicore 1008 Processor FPGA System
- 2008, An FPGA Host-Multithreaded Functional Model for Sparc v8
- 2006, The Landscape of Parallel Computing Research: A View from Berkeley
