Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics

TitleBuilding Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics
Publication TypeConference Paper
Year of Publication2008
AuthorsBatten, C., Joshi P., Orcutt J., Khilo A., Moss B., Holzwarth C., Popovic M., Li H., Smith H., Hoyt J., Kaertner F., Ram R., Stojanovic V., & Asanović K.
Conference NameHot Interconnects
Date Published08/2008
PublisherIEEE
ISBN Number978-0-7695-3380-3
Abstract

We present a new monolithic silicon photonics technology suited for integration with standard bulk CMOS processes, which reduces costs and improves opto-electrical coupling compared to previous approaches. Our technology supports dense wavelength-division multiplexing with dozens of wavelengths per waveguide. Simulation and experimental results reveal an order of magnitude better energy-efficiency than electrical links in the same technology generation. Exploiting key features of our photonics technology, we have developed a processor-memory network architecture for future manycore systems based on an opto-electrical global crossbar. We illustrate the advantages of the proposed network architecture using analytical models and simulations with synthetic traffic patterns. For a power-constrained system with 256 cores connected to 16 DRAM modules using an opto-electrical crossbar, aggregate network throughput can be improved by ~8-10x compared to an optimized purely electrical network.

DOI10.1109/HOTI.2008.11
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Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics.pdf3.43 MB