Discussions for Circuit Computational Pattern
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Discussions for Circuit Computational Pattern

We want to separate specification(basic gates/RTL) from implementation(standard cell gates or instructions). The mapping from one to the other is a synthesis/compilation problem. The key difference between compilation to gates from compilation to instructions is that routing/selecting wires is essentially free for gates, but currently extremely expensive for instructions (i.e. you can do »128 bit ops per bit insertion/route).