Title: Short Course on Parallel Programming Dates: August 18- 20, 2014 Location: This short course is offered online through EdX. To access the pre-recorded lectures: GO HERE
The 2014 Short Course on Parallel Programming ("boot camp") is intended to offer programmers a practical introduction to parallel programming techniques and tools on current parallel computers, including shared memory/multicore, GPU/manycore, distributed memory and cloud computing.
Short Course on Parallel Programming Dates: August 19- 21, 2013 Times: 8/19 from 9AM-6PM; 8/20 from 8:45AM - 6PM; 8/21 from 8:45AM - 5PM (may change) Location: Banatao Auditorium, Sutardja Dai Hall, University of California at Berkeley Visitor Information for Sutardja Dai Hall (Citris Building)
The 2013 Pab Lab Boot Camp – Short Course on Parallel Programming is intended to offer programmers a practical introduction to parallel programming techniques and tools on current parallel computers, emphasizing multicore and manycore computers.
Abstract: To help parallel computing become mainstream, one of the main design considerations for multicore architectures should be support for programming productivity. This means designs that can deliver high performance and efficiency while relieving programmers and compiler writers from managing low-level tasks, and designs that help minimize the chance of parallel programming errors.
In this talk, I will present an overview of the ideas behind the Scalable and Flexible Bulk Architecture. The architecture has a set of novel techniques for programmability, while retaining scalability and flexibility. In particular, I will present Volition, the first hardware scheme that detects Sequential Consistency Violations (SCVs) in a relaxed-consistency machine precisely, in a scalable manner, and for an arbitrary number of processors in the cycle. Volition enhances programmability, while inducing negligible traffic and execution overhead. Moreover, I will present the scalable cache coherence protocols for the atomic block execution.
Bio: Xuehai Qian is a Ph.D candidate in the Department of Computer Science at the University of Illinois, Urbana-Champaign. His research focuses on multicore and parallel computer architecture, and programming models for parallelism. He received an MS in Computer Science from the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS), and a BS in Computer Engineering from Beihang University, Beijing.
