TALK: Efficient and Easily Programmable Accelerator Architectures

05/13/2013 2:00 pm

TALK: Prof Tor Aamodt, University of British Columbia - Mon, May 13 at 2pm in Woz (430 Soda)

Speaker: Tor Aamodt, University of British Columbia

Title: Efficient and Easily Programmable Accelerator Architectures

Abstract: Current projections suggest semiconductor scaling may end near the 7nm process node within 10 years. Energy efficiency is already a primary design goal due to the end of voltage scaling. Programmable accelerators such as graphics processing units (GPUs) can potentially enable further reductions in the cost of computation along with further increases in computing efficiency. However, GPUs are typically perceived as suitable only for a narrow range of applications such as high performance computing. This talk will describe recent research on hardware changes to broaden the range of applications that benefit from GPU-like accelerators. Approaches discussed will include introducing transactional memory and coherence into GPUs as well as improving cache utilization via hardware thread scheduling.

Bio: Tor Aamodt is an Associate Professor in the Department of Electrical and Computer Engineering at the University of British Columbia. Two of his papers on (GPU-like) accelerators have been selected as "Top Picks" from computer architecture conferences by IEEE Micro magazine. He is an Associate Editor for IEEE Computer Architecture Letters, Program Chair for ISPASS 2013, and has served on the program committee of several computer architecture conferences. He received his BASc (in Engineering Science), MASc and PhD at the University of Toronto. He worked at NVIDIA on the memory system of the first GPU supporting CUDA (G80).